Image sensors are widely used in digital still cameras, cellular phones, security cameras, as well as in, medical, automobile, and other applications. Complementary metal-oxide-semiconductor (“CMOS”) technology is used to manufacture lower cost image sensors on silicon substrates. In a large number of image sensors, the image sensor commonly includes hundreds, thousand or even millions of light sensor cells or pixels. A typical individual pixel includes a micro-lens, a filter, a photosensitive element, a floating diffusion region, and one or more transistors for reading out a signal from the photosensitive element. As image sensor pixels become smaller and smaller, the transistors inside them must also become smaller. However, conventional transistor technologies encounter isolation challenges and increased manufacturing expenses as the size of the transistors in image pixels shrink.
Shallow Trench Isolation (“STI”), and Local Oxidation of Silicon (“LOCOS”) are isolation technologies that are used in image pixels. LOCOS is suitable for image sensors, but it is difficult to reduce the size of the pixel with LOCOS technology. STI generally has less encroachment than LOCOS into the active region of a transistor, and may be chosen instead of LOCOS. However, both technologies create an isolation edge effect where the isolation region meets the active portion of a transistor. The isolation edge effect can negatively influence the electrical characteristics of a transistor. For example, STI may cause white (a.k.a. “hot pixels”) or dark pixels. One component of the isolation edge effect is sometimes called the narrow width effect, which increasingly becomes a factor in small-geometry MOSFET design.
Tooling for fabrication becomes more and more expensive as transistors get smaller. Reducing the size of a transistor requires tools with smaller tolerances and these precision tools increase manufacturing cost. A reticle, used in photolithography, is one example of a transistor fabrication tool that requires tighter tolerance. Another byproduct of manufacturing smaller transistors is higher defect rates due to misalignment of transistor structures in the fabrication process.